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Intel Xeon chipsets : ウィキペディア英語版 | Intel Xeon chipsets Around the time that the Pentium 3 processor was introduced, Intel's Xeon line diverged from its line of desktop processors, which at the time was using the Pentium branding. The divergence was implemented by using different sockets; since then, the sockets for Xeon chips have tended to remain constant across several generations of implementation. The chipsets contain a 'memory controller hub' and an 'I/O controller hub', which tend to be called 'north bridge' and 'south bridge' respectively. The memory controller hub connects to the processors, memory, high-speed I/O such as PCI Express, and to the I/O controller hub by a proprietary link. The I/O controller hub on the other hand, connects to lower-speed I/O, such as hard discs, PCI slots, USB and Ethernet. == P6-based Xeon chipsets ==
抄文引用元・出典: フリー百科事典『 ウィキペディア(Wikipedia)』 ■ウィキペディアで「Intel Xeon chipsets」の詳細全文を読む
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